The present invention pertains to pulse expansion/pulse compression systems useable with poly-phase coding and in a Doppler environment and, further, to pulse compression systems included on a single semiconductor chip. Common bi-phase codes or digital samples of linear or non-linear chirp codes are included as subsets.
Many radar and data link applications require a pulse compression device in order to achieve increased pulse energy while simultaneously achieving improved target location accuracy. If no Doppler frequency shift is present in the application, it is common to apply bi-phase coded waveforms. However, these waveforms are sensitive to the presence of Doppler and the magnitude of the realized pulse compression value rapidly diminishes as the magnitude of the Doppler shift increases.
In order to overcome the imitations encountered by Doppler, it is common practice to apply linear frequency modulated (chirp) waveforms because they exhibit significant tolerance to the presence of Doppler. Up to now, the realization of the chirp waveform has been by means of an analog device, such as a Surface Acoustic Wave (SAW) filter. Unfortunately, SAWs are typically limited to pulse lengths of 50 microseconds or so, although longer pulse lengths can theoretically be handled by a series of individual SAW devices. This is a cumbersome implementation; especially complicated by the need to impose time-sidelobe weighting functions. Any change in any of the pulse compression parameters necessitates the design of a new SAW device.
At present a VHSIC convolver chip, identified as TVC901, is available from the TRW Corp. This chip can perform pulse compression of bi-phase coded waveforms. In a simplified description of the operation, the reference signal (code) is continuously fed in one chip per clock cycle so that at any point in time, the entire code appears on the chip. On the other hand, the input data samples are not stored in a tapped delay line, but are instantaneously correlated (multiplied) with all code chips on each clock cycle. The results are fed back to an output adder that is continuously "waterfalled" to provide the output for the last PCR clock cycles, where PCR is the pulse compression ratio. The convolution is performed by hardwired multiplies implemented with 2.5 bits (0,+1,+2). The data is also single sampled.